1. Field of the Invention
The present invention pertains to the field of solid-state memories. More particularly, this invention relates to a solid-state random access memory with magnetic storage cells.
2. Art Background
Solid-state memories have a wide variety of applications including, but not limited, to computer systems and consumer electronics such as personal computers, hand-held computers, file servers, radios, personal digital assistants, telephones, and video games.
Solid-state memories are usually constructed of semiconductor material. For example, solid-state memories include dynamic random access memories (DRAMs) as well as persistent or non-volatile memories such as flash memory, to name a few. A solid-state memory is typically arranged as one or more arrays of memory cells or storage cells. The structure of each storage cell typically provides a mechanism for storing a bit of information. For example, the storage cells in a typical DRAM include structures that form a capacitor for storing an electrical charge to represent information such as a data bit. In addition, the storage cells in a typical flash memory include structures that form a floating gate for persistent storage of an electrical charge.
A solid-state magnetic memory can also be constructed of magnetic materials. In a magnetic random access memory (MRAM), a bit of information is stored in the magnetic state of a patterned magnetic thin film. Typically, an MRAM contains of an array of magnetic memory cells positioned at the points of intersection of a cross-point array of conductors. The conductors are used to write information into the MRAM by application of current to selected row and column conductors. This current subjects all bits along the selected row and column to magnetic field. Inadvertent writing of unselected bits on the selected row and column conductors creates “half-select” writing errors. The same row and column conductors can be used to read information from the MRAM by measuring the resistance of selected memory cells. Sharing conductors for reading and writing functions makes it difficult to simultaneously read and write data within an MRAM array.
An MRAM design is desired that mitigates or eliminates half-select writing and enables simultaneous read and write functions.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.